Company
From the Edge to the AI Factory.
Where AI, open architecture, and sovereign compute converge.
Two decades across ARM, PowerPC, MIPS, and now RISC‑V taught us one thing: silicon only matters when the software is ready. VRULL exists to make sure it is — from the ISA extensions through the compilers to the ecosystem that lets customers ship.
Leadership
Philipp Tomsich
Founder & Chief Technologist
Philipp started his career as a compiler engineer at SGI, moved through banking and government IT consulting, and spent a decade at TU Vienna — teaching software engineering and OS kernels, researching runtime systems and compilers for HPC, and working on parallelised implementations of AI kernels as early as 2002 (we called them Self-Organising Maps back then — little did we know). He founded Theobroma Systems — an embedded systems company later acquired by Cherry GmbH — where he built the engineering culture and product discipline that VRULL inherits.
At VRULL, he leads the technical work across ISA design, compiler engineering, and AI software enablement. A frequent speaker and a believer that sovereignty comes from sharing — not from hoarding — he is also a vocal advocate of AI-enabled companies: organisations that embed AI into how they work, not just what they sell. If there's a compiler problem upstream that nobody wants to own, he's probably already working on it.
RISC‑V International
- Vice-Chair, Technical Steering Committee
- Board of Directors (Strategic Membership Tier)
- Chair, Applications & Tools Software HC
- Acting Chair, AME Task Group
Awards
- 2021 Community Contributor Award
- 2021 Board Technical Leadership Award
- 2024 Ratification Award (Zicond)
Makeljana Shkurti
Strategy & Ecosystem Relations
Makeljana studied International Economic Relations in Bucharest and Vienna, and cut her teeth at Theobroma Systems, where she shaped the commercial function and was part of the management team through the company's successful sale. That taught her something most strategy people never learn first-hand: aligning customer ambition, commercial viability, and engineering reality into one coherent whole.
She contributes to RISC‑V standards bodies, publishes on the intersection of AI and production readiness, and makes the case on keynote stages — including the keynote stage at RISC‑V Summit NA 2025 alongside the EdgeAI Foundation. She organised the first Sino-European RISC‑V workshop in Tirana. That work shapes the ecosystem VRULL operates in and the global conversation about where AI meets silicon — from a distinctly European vantage point.
She has an instinct for knowing when a technical conversation needs to become a commercial one — and the credibility to make that transition without losing the room. In 2021 she founded Software Ecosystem Solutions, creating pathways for Albanian engineering talent into international work.
RISC‑V International
- Chair, AI Market Development Group
- Member, Legal Committee
- Member, Marketing Committee
How we got here
Where we started
We built ARM-based compute modules for industrial and sovereign applications — designed, manufactured, and supported through full product lifecycles. That work taught us what practical, repeatable, scalable product engineering requires. Not as a theory. As a daily discipline. We carry that with us.
What ARM, PowerPC, and MIPS taught us
Years across ARM, PowerPC, and MIPS taught us the same lesson from different angles: ISA design, microarchitecture, and software are one problem seen from three perspectives. The 64-bit ARM transition — including the first server-class AArch64 silicon from AMCC (now Ampere Computing) — showed us how critical the software ecosystem is to bringing a new architecture to production. Upstream is the only path that scales.
Why we bet on RISC‑V
We didn't come to RISC‑V because it was fashionable. We came to it because openness is a pragmatic engineering choice — an ISA you can audit, port, and evolve without asking permission. That matters to the silicon companies, governments, and integrators we work with. The bet was that RISC‑V would become the architecture where serious AI compute happens. That bet is paying off.
Where AI changed the equation
AI made everything a compiler story. The distance between a model and the silicon it runs on is defined entirely by the software stack in between. RISC‑V, AI, and sovereign compute are not three separate trends — they are one convergence. We've been building toward it for twenty years, even before it had a name.
Your silicon ships once.
The software has to be ready when it does. Twenty years of doing exactly that is what we bring.